1. Field of the Invention
The invention relates to a liquid crystal display (LCD) device and more particularly to an LCD device with a non-symmetric design for a space between a data bus line and a pixel electrode in order to effectively prevent a disclination effect generated in a liquid crystal reverse region.
2. Description of the Related Art
Liquid crystal display (LCD) devices are a well-known form of flat panel display with advantages of low power consumption, light weight, thin profile and low driving voltage. Liquid crystal molecules change their orientations and photo-electronic effects when an electrical field is applied. In an LCD display region, an array of pixel regions is patterned by horizontally extended scanning bus lines and vertically extended data bus lines. For a TFT-LCD device, each pixel region has a thin film transistor (TFT) and a pixel electrode, in which the TFT serves as a switching device. The conventional electrode array design for a TFT-LCD device, however, has the disadvantage of the so-called Mura phenomenon caused by a disclination effect. The Mura phenomenon is considered a push Mura area with light strips which are visible on the LCD screen and detectable in gray scale.
The disclination effect is caused by a strong lateral direction electrical field between the pixel electrode and the data bus line, resulting in a light leakage area. In order to eliminate the disclination effect, a transparent insulating film with a thickness of 1 μm or more is interposed between the data bus line and the pixel electrode, and the space between two adjacent pixel electrodes is narrowed to reach 2˜5 μm to overlap the periphery of the data bus line. This electrode array design, however, causes problems of coupling capacitance and cross talk between the pixel electrode and the data bus line.
Currently, two approaches to the disclination effect have been developed, in which one is to keep a sufficient space between the pixel electrode and the data bus line, and the other one is to employ a BM (black matrix) pattern for shielding the light leakage area. FIG. 1 is a plane view illustrating an electrode array of a conventional TFT-LCD device. FIG. 2 is a cross-section along line 1—1 of FIG. 1 illustrating the space between the data bus line and the pixel electrode. A TFT-LCD device 10 comprises an upper glass substrate 12, a lower glass substrate 14 and an LC layer 16 interposed therebetween. The upper glass substrate 12 comprises a color filter (CF) layer 18, a black matrix (BM) layer 20 and a common electrode layer 22. The lower glass substrate 14 comprises a plurality of horizontally extended scanning bus lines 24 and a plurality of vertically extended data bus lines 26 which are perpendicularly arranged in a matrix form to define a plurality of pixel areas 28. Each of the pixel areas 28 comprises a TFT device 30, a pixel electrode layer 32 and a pair of light-shielding layers 34.
First, a first metal layer is deposited and patterned as the light-shielding layers 34 and the scanning bus lines 24, and then a gate insulating layer 25 is deposited thereon. Next, a second metal layer is deposited and patterned as the data bus lines 26, and then a passivation layer 27 is deposited on the data bus lines 26 and the gate insulating layer 27. Next, a transparent conductive layer is deposited and patterned as the pixel electrode layer 32. In addition, the BM layer 20 overlap the TFT device 30, the light-leakage gap between the scanning bus line 24 and the periphery of the pixel electrode layer 32, and the light-leakage gap between the data bus line 26 and the periphery of the pixel electrode layer 32. Also, the BM layer 20 may fully overlaps the light-shielding layers 34.
In FIG. 1, the light-shielding layer 34 extends along the data bus line 26 without connecting the scanning bus line 24 and is positioned in a space between the data bus line 26 and the periphery of the pixel electrode layer 32. Preferably, in the first pixel area 28I, the first light-shielding layer 34I is positioned in a first space between the first data bus line 26I and the periphery of the first pixel electrode layer 32I, and the second light-shielding layer 34II is positioned in a second space between the second data bus line 26II and the periphery of the first pixel electrode layer 32I. Also, the first-shielding layer 34I is partially overlapped by the periphery of the first pixel electrode layer 32I, and the second-shielding layer 34II is partially overlapped by the periphery of the first pixel electrode layer 32I.
In FIG. 2, using the first data bus line 26I as the criterion, a symbol “S1” indicates a first space between the first data bus line 34I and the periphery of the first pixel electrode layer 32I within the first pixel area 28I, and a symbol “S2” indicates a second space between the first data bus line 26I and the periphery of the second pixel electrode layer 32I within the second pixel area 28II. According to a symmetric design, the first space S1 is equal to the second space S2, approximately 3.5 μm. Also, a symbol “W1” indicates a first overlapping width between the BM layer 20 and the first light-shielding layer 34I, and a symbol “W2” indicates a second overlapping width between the BM layer 20 and the second light-shielding layer 34II. According to a symmetric design, the first overlapping width W1 is equal to the second overlapping width W2, approximately 6.0 μm.
In order to prevent the disclination effect, the conventional TFT-LCD device 10 employs the sufficient space S1 or S2 to minimize the coupling capacitance and the electrical field between the data bus line 26 and the periphery of the pixel electrode layer 32. The symmetric design rule for the spaces S1 and S2, however, is ineffective because the disclination level in the first space S1 is different from that in the second space S2 in accordance with a rubbing direction and the LC molecule rotation. FIG. 3 is a plane view illustrating the disclination level in the first space S1 and the second space S2. An arrow 36 indicates a rubbing direction on an alignment film, an arrow 38 indicates an LC rotating direction, and the character 40 indicates an LC molecule. When an outer voltage is applied to the TFT-LCD device 10, the LC molecules 40 arise in a pretilt direction in accordance with the rubbing direction 36. When a strong lateral electrical field between the pixel electrode layer 32 and the data bus line 26 is generated in reverse to the pretilt direction, the LC molecule 40 is oriented to the direction of the lateral electrical field to reach a reverse tilt state, resulting in a disclination effect at a boundary between the normal tilt region and the reverse tilt region. In particular when the rubbing direction 36 is at a 45° angle to the X axis, the LC molecule 40I adjacent to the first space S1 always rotates to the reverse tilt state, thus the disclination effect adjacent to the first space S1 is more serious than that adjacent to the second space S2. Based on the symmetric design for the first space S1 and the second space S2, a larger space between the data bus line 26 and the periphery of the pixel electrode layer 32 is required to solve the disclination effect found in the first space S1, but an accompanying problem of increased light leakage occurs.